Intelligent Design and Application Laboratory
(IDA Lab)
Multi-domain Innovation with AI at the Core:
Intelligent Solutions for VLSI Design, Hardware Security, and Healthcare
Multi-domain Innovation with AI at the Core:
Intelligent Solutions for VLSI Design, Hardware Security, and Healthcare
The Intelligent Design and Application Laboratory (IDA Lab) at National Taiwan Ocean University is dedicated to advancing research in the intersection of artificial intelligence and various application domains including VLSI design, hardware security, and healthcare.
Our mission is to develop innovative solutions through the application of cutting-edge AI technologies to solve complex problems across multiple domains. We focus on translating theoretical advancements into practical applications with real-world impact.
Led by Dr. Chia-Heng Yen, our team consists of talented researchers and students from diverse backgrounds, working collaboratively on interdisciplinary projects that bridge the gap between technology and application domains.
Optimizing integrated circuit testing and design processes through advanced machine learning techniques.
Enhancing chip security through innovative detection and protection mechanisms for hardware trojans.
Developing advanced algorithms for cancer prediction and diagnosis using medical image analysis.
Creating optimized circuit designs with innovative architectures for better performance and power efficiency.
We are currently recruiting Master's students. If you are interested in Electronic Design Automation, Digital Design, Intelligent Application, and Intelligent Healthcare, please feel free to contact me.
2025/02/27
Assistant Professor at Department of Computer Science and Engineering
National Taiwan Ocean University
Email: chyen[at]mail.ntou.edu.tw
Tel: +886-2-2462-2192 #6679
Office: ECG 703
IDA Lab: ECG 810
National Yang Ming Chiao Tung University (NYCU)
Laboratory: Computer-Aided Design for G(reen)-RE(liable)-A(nd)-T(rustworthy) (GREAT) Systems Lab.
Advisor: Prof. Kai-Chiang Wu
Doctoral Dissertation: Machine Learning-Based IC Testing – Reliability and Security Perspectives
National Chiao Tung University (NCTU) (currently National Yang Ming Chiao Tung University)
Laboratory: Intelligent Computing Lab.
Advisor: Distinguished Prof. Shinn-Ying Ho
Master's Thesis: Prediction of Recurrence Time after Therapeutic Surgery Using CT Images on Liver Tumor
National Taiwan Ocean University (NTOU)
Our research in IC testing addresses two key challenges through AI techniques. First, we develop CNN-based stochastic regression methods for IDDQ outlier identification, effectively distinguishing leakage current variations from actual defects in IC testing. Second, we address the neighborhood effect problem in wafer testing through innovative methods to identify Good-Dice-in-Bad-Neighborhoods (GDBN), integrating wafer-level defect pattern information with advanced machine learning models ranging from CNNs to Transformer architectures. Both approaches significantly improve testing accuracy, yield rates, and cost efficiency.
Application of machine learning and deep learning techniques to medical image analysis, with particular focus on cancer prediction. This research demonstrates the perfect integration of technology and clinical applications, bridging the gap between advanced AI technologies and real-world medical challenges in cancer diagnosis and prognosis.
An emerging research direction focusing on using machine learning techniques to enhance chip security. We apply cutting-edge graph neural network technologies (GCN and GAT) to address critical security problems of hardware trojan detection and localization, providing comprehensive protection mechanisms for hardware security.
Focused on high-performance digital circuit design, particularly innovation and optimization of adder architectures. Our sum-prediction adder research targets the most commonly used basic computational units in modern processors, achieving a balance between speed, power consumption, and area through clever architectural optimization. This research not only focuses on theoretical performance improvements but also considers engineering constraints in practical application environments.
This research direction encompasses both routing techniques and power optimization for integrated circuits. For routing, we address challenges in emerging materials such as graphene nanoribbons (GNR) and complex 3D integrated circuits. Our power optimization work focuses on multi-bit flip-flop (MBFF) utilization strategies to reduce clock power consumption, an increasingly critical concern in modern low-power designs.
This course covers the fundamental concepts of digital logic design, including Boolean algebra, logic gates, combinational and sequential circuits, optimization techniques, and introduction to digital systems.
A hands-on laboratory course focuses on digital logic design using breadboards and Computer-Aided Design (CAD) tools. The course emphasizes practical skills in digital logic design, including circuit construction and debugging, and design verification.
