Laboratory Overview
The Intelligent Design and Application Laboratory (IDA Lab) at National Taiwan Ocean University advances research at the intersection of artificial intelligence and engineering, spanning five core areas: Intelligent EDA, Hardware & AI Security, Biomedical AI, AI Computing & Hardware Design, and Algorithm Design & Optimization.
Our mission is to develop principled, impactful AI-driven solutions: automating integrated circuit design and testing, protecting hardware and AI systems from security threats, enabling clinical decision support through medical data analysis, and advancing efficient AI computing and optimization algorithms.
Led by Dr. Chia-Heng Yen, IDA Lab brings together researchers and students from diverse backgrounds to work on interdisciplinary projects that translate theoretical advances into real-world applications.
Laboratory History
Laboratory Establishment
The Intelligent Design and Application Laboratory (IDA Lab) was officially established at the Department of Computer Science and Engineering, National Taiwan Ocean University (NTOU), under the leadership of Dr. Chia-Heng Yen.
Research Highlights
Intelligent Electronic Design Automation (EDA)
Applying machine learning to automate IC testing, defect diagnosis, yield enhancement, and physical design, accelerating the development of reliable and manufacturable integrated circuits.
Hardware & AI Security
Advancing trustworthy computing through machine learning-based hardware Trojan detection and emerging research on the security and robustness of AI agent systems.
Biomedical AI
Translating deep learning into clinical impact through medical image analysis, cancer detection and prognosis prediction, and multimodal biomedical data analytics for precision medicine.
AI Computing & Hardware Design
Co-optimizing algorithms and silicon, spanning model compression, neural architecture search, dedicated AI accelerator design, and high-performance arithmetic circuit development.
Algorithm Design & Optimization
Developing metaheuristic and AI-guided algorithms for parameter optimization and combinatorial problem solving in complex, high-dimensional engineering design spaces.
Latest Announcements
Graduate Student Recruitment
We are currently recruiting Master's students. If you are interested in Intelligent EDA, Hardware and AI Security, Biomedical AI, AI Computing and Hardware Design, or Algorithm Design and Optimization, please feel free to contact Dr. Chia-Heng Yen.
2025/02/27Principal Investigator
Dr. Chia-Heng Yen (顏家珩)
Assistant Professor at Department of Computer Science and Engineering
National Taiwan Ocean University
Adjunct Assistant Professor at Department of Computer Science, National Yang Ming Chiao Tung University
Email: chyen [at] mail.ntou.edu.tw
Tel: +886-2-2462-2192 #6679
Office: ECG 703
IDA Lab: ECG 810
Education
Doctor of Philosophy (Ph.D.) in Computer Science and Engineering
National Yang Ming Chiao Tung University (NYCU)
Laboratory: Computer-Aided Design for G(reen)-RE(liable)-A(nd)-T(rustworthy) (GREAT) Systems Lab.
Advisor: Prof. Kai-Chiang Wu
Doctoral Dissertation: Machine Learning-Based IC Testing – Reliability and Security Perspectives
Work Experience
Assistant Professor
Department of Computer Science and Engineering, National Taiwan Ocean University (NTOU), Keelung City, Taiwan (R.O.C.)
Adjunct Assistant Professor
Department of Computer Science, National Yang Ming Chiao Tung University (NYCU), Hsinchu City, Taiwan (R.O.C.)
Professional Services
Board / Committee Membership
Academic Services
Journal Reviewer
Research Topics
Intelligent Electronic Design Automation (EDA)
Applying machine learning and algorithmic methods to automate IC design, testing, and manufacturing, spanning physical design, yield enhancement, and post-silicon validation.
IC Testing & Manufacturing
We develop CNN-based and transformer-based methods for wafer-level defect analysis, IDDQ outlier identification, and Good-Dice-in-Bad-Neighborhoods (GDBN) detection, significantly improving testing accuracy and manufacturing yield.
View all publications →Physical Design & Routing
We address routing challenges in emerging interconnect technologies such as graphene nanoribbons (GNR) and 3D ICs, alongside clock power optimization through multi-bit flip-flop (MBFF) utilization for modern low-power designs.
View all publications →
Hardware & AI Security
Ensuring trustworthiness at both the silicon and intelligence layers, covering hardware Trojan detection and the security of AI agent systems.
Hardware Trojan Detection
We develop machine learning-based methods for hardware Trojan detection and localization, leveraging structural circuit features, path analysis, and graph-based representations to provide robust protection mechanisms for chip-level security.
View all publications →AI Model Security
We study the security of the learning models themselves, including backdoor and adversarial attacks against graph neural networks used for circuit analysis, threat surfaces introduced by continual learning and model updating, and mitigation strategies that preserve detection accuracy while restoring model trustworthiness.
View all publications →AI Agent Security
We investigate security vulnerabilities and defense mechanisms in LLM-based and autonomous AI agent systems, including prompt injection, adversarial attacks, and trust boundary enforcement for safe deployment.
Biomedical AI
Applying machine learning and deep learning across medical imaging and structured biomedical data, turning clinical, imaging, and molecular signals into actionable insights for diagnosis, prognosis, and treatment decisions.
Medical Image Analysis
We develop deep learning models that operate directly on medical images such as CT, MRI, and ultrasound, covering lesion detection, segmentation, and image-based estimation and prognosis, while addressing annotation variability and predictive uncertainty to support clinical decision-making.
View all publications →Biomedical Data Analytics
We design evolutionary and AI-based models for risk stratification, prognosis, and drug-response prediction from structured biomedical data such as clinical, radiomic, and molecular profiles, with an emphasis on calibrated uncertainty and generalization to unseen patients and cell lines.
View all publications →
AI Computing & Hardware Design
Bridging algorithm and silicon, from model-level optimization down to arithmetic circuit design for efficient AI inference.
Model Compression & Optimization
We develop compression and efficiency techniques including quantization, pruning, knowledge distillation, low-rank factorization, and neural architecture search (NAS) to reduce model size and inference cost while preserving accuracy for real-world deployment.
AI Accelerator Design
We design dedicated hardware accelerators for neural network inference and training, targeting efficient dataflow architectures, on-chip memory optimization, and fault-tolerant accelerator designs for reliable AI deployment.
Reliable AI Computing
We improve the fault resilience of AI inference under tight memory and area budgets, including layer-selective error-correcting code (ECC) allocation, protection of reduced-precision (BF16) KV caches in LLM serving, and sensitivity-aware trade-offs between protection overhead and end-to-end model accuracy.
View all publications →Arithmetic Circuit Design
We investigate high-performance arithmetic circuits, particularly adder architectures that balance speed, power, and area as fundamental building blocks for modern processors and AI accelerators.
View all publications →
Algorithm Design & Optimization
Designing principled algorithms to solve high-dimensional and combinatorially complex problems in engineering and AI systems.
Metaheuristic & Evolutionary Optimization
We explore metaheuristic and evolutionary strategies for hyperparameter tuning and multi-objective optimization across complex design spaces, improving convergence efficiency and solution quality.
Combinatorial Optimization
We address NP-hard combinatorial problems arising in EDA and system design using heuristic search, graph-based methods, and AI-guided optimization strategies for scalable and high-quality solutions.
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Research Projects
Faculty Research Grants
Funding Agency: National Science and Technology Council (NSTC), Taiwan (R.O.C)
Project ID: NSTC 115-2221-E-019-056
Funding Agency: National Science and Technology Council (NSTC), Taiwan (R.O.C)
Project ID: NSTC 114-2222-E-019-003
Student Projects
Program: 國家科學及技術委員會 大專學生研究計畫
Sponsor: 國家科學及技術委員會 (NSTC)
Project ID: NSTC 115-2813-C-019-039-E
Student: 楊佳熹
Program: 國立臺灣海洋大學 大學生暑期學習實務體驗計畫
Sponsor: 國立臺灣海洋大學教務處教學中心
Project ID: E-118
Category: 研究類
Student: 洪子懿
Program: 國立臺灣海洋大學 大學生暑期學習實務體驗計畫
Sponsor: 國立臺灣海洋大學教務處教學中心
Project ID: E-117
Category: 研究類
Student: 楊佳熹
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Lab Members
Master Students
許博瑄
Dept. of Computer Science and Engineering
簡胤亘
Dept. of Computer Science and Engineering
徐郁庭
Dept. of Computer Science and Engineering
沈牧宣
Dept. of Computer Science and Engineering
劉旭峰
Dept. of Computer Science and Engineering
陳秉新
Dept. of Computer Science and Engineering
李泓勳
Dept. of Computer Science and Engineering
林敬恆
Dept. of Computer Science and Engineering
鄭至傑
Dept. of Computer Science and Engineering
呂柚陞
Dept. of Computer Science and Engineering
洪子懿
Dept. of Computer Science and Engineering
林瑀涵
Dept. of Computer Science and Engineering
Part-Time Master Students
吳允佑
Dept. of Computer Science and Engineering
吳東謙
Dept. of Computer Science and Engineering
陳威任
Dept. of Computer Science and Engineering
Undergraduate Students
Undergraduate Researchers
Lab Works
Album
Photos coming soon.